操作系统：Windows 10 x64
工具1：Allegro PCB Design XL (legacy)version 16.6-
工具2：PADS Layout VX.2.3
参考1：/jishu_460638_1_1.html(教程)
参考2：/article/4b07be3ca79a7c48b380f331.html(教程)
参考3：/thread-106414-2-1.html(异常解决方法)
参考4：Allegro转PADS以及后续修改
参考5：Allegro to PADS® Layout Translator User's Guide(用户手册)提取码：x8fs
由PADS提供的参考手册，只要安装了PADS，就可以在X:\MentorGraphics\PADSVX.2.3\docs\pdfdocs里面找到该文件，文档原名《allegro2pads.pdf》。
情况1：Cadence、PADS安装在同一台机器上。
步骤1：
复制：<PADS安装目录>\SDD_HOME\translator\skill_scripts中的内容，以及<PADS安装目录>\SDD_HOME\translator\win32\bin\tech_translator.exe
到D:\Cadence\SPB_Data\pcbenv
注意：Cadence一般是安装在C盘的，而我是将Cadence安装在D盘。
步骤2：
确保以下列出的三个环境变量已设置正确。
变量：SDD_HOME，值：D:\MentorGraphics\PADSVX.2.3\SDD_HOME(值取决于PADS的安装路径)
变量：AEX_BIN_ROOT，值：D:\Cadence\SPB_Data\pcbenv(值取决于Cadence的安装路径)
变量：AEX_ENABLE_JOBPREFS_LAYER_FIX，值：1
步骤3：
创建一个新文件夹，将需要转换的.brd设计文件复制到这里面，使用Allegro PCB Design XL (legacy) 打开该设计文件。
在command提示窗口中输入下列命令：skill load "dfl_main.il"，并按回车键。dfl_main.il文件来自<PADS安装目录>\SDD_HOME\translator\skill_scripts。
注意：第一次输入可能没有反应，你需要再次输入。反正我的就是这样，第一次输入之后，按回车键，只显示一个“t”。
Command >skill load "dfl_main.il"tCommand >skill load "dfl_main.il"function make_DC_sControlVars redefinedfunction copy_DC_sControlVars redefinedfunction make_DC_sPackage redefinedfunction copy_DC_sPackage redefinedfunction make_DC_sText redefinedfunction copy_DC_sText redefinedfunction make_DC_sClearance redefinedfunction copy_DC_sClearance redefinedfunction make_DC_sDefClearance redefinedfunction copy_DC_sDefClearance redefinedfunction make_DC_sWidth redefinedfunction copy_DC_sWidth redefinedfunction make_DC_sNetData redefinedfunction copy_DC_sNetData redefinedfunction make_DC_sElectricalRule redefinedfunction copy_DC_sElectricalRule redefinedfunction make_DC_sMatchedDelayRule redefinedfunction copy_DC_sMatchedDelayRule redefinedfunction make_DC_sRuleArea redefinedfunction copy_DC_sRuleArea redefinedfunction make_DC_sFormula redefinedfunction copy_DC_sFormula redefinedfunction make_DC_netPinData redefinedfunction copy_DC_netPinData redefinedfunction make_DC_netKeyData redefinedfunction copy_DC_netKeyData redefinedfunction make_DC_sSymbolProps redefinedfunction copy_DC_sSymbolProps redefinedfunction DC_ShowVersion redefinedfunction DC_EnableAl2ExpDebug redefinedfunction DC_DisableAl2ExpDebug redefinedfunction DisableDynamicFillMode redefinedfunction EnableDynamicFillMode redefinedfunction CreatePinName redefinedfunction DC_Output_Choice_BuildForm redefinedfunction DC_Output_Choice_Callback redefinedfunction DC_Output_Choice redefinedfunction DC_Output_Callback redefinedfunction DC_Output_BuildForm redefinedfunction DC_Output_Stub redefinedfunction DC_Output redefinedfunction DC_Set_Void redefinedfunction DC_write_Dfile redefinedfunction DC_write_Netlist redefinedfunction DC_add_symbols redefinedfunction DC_rem_symbols redefinedfunction DCFindRuleSchemes15 redefinedfunction DCFindRuleSchemes redefinedfunction DCprocessNetClassStuff redefinedfunction DCprocessPadstacks redefinedfunction DCprocessNetProps redefinedfunction DCprocessAXLLayers redefinedfunction DCprocessTechFileLayers redefinedfunction DCprocessTechFileRules redefinedfunction DCcreateDummyRules redefinedfunction DCissueTechFileRules redefinedfunction DCprocessFormulaTable redefinedfunction DCprocessWidthTable redefinedfunction DCprocessBoardOutline redefinedfunction DCprocessBoardAreas redefinedfunction DCprocessDevicePad redefinedfunction DCprocessPlacement redefinedfunction DCprocessClearanceTable redefinedfunction DCoutputViaAsKeepout redefinedfunction DCprintCompPackage redefinedfunction DC_Input_Callback redefinedfunction DC_Input_BuildForm redefinedfunction DC_Input redefinedfunction DC_read_ndd redefinedfunction DC_read_rules redefinedfunction DC_netin redefinedfunction DC_initialize_path_for_tracks redefinedfunction DC_build_path_for_tracks redefinedfunction DC_build_arc_for_tracks redefinedfunction DC_commit_path_for_tracks redefinedfunction DC_Print_Bad_Path_To_Error_Log redefinedfunction DC_InitForOutput redefinedfunction DC_ExportConstraints redefinedfunction DC_ReadViaSideFile redefinedfunction DCsetUnits redefinedfunction DCprocessNetNums redefinedfunction DCprocessPartNums redefinedfunction DCprocessGenericNums redefinedfunction DCprocessRuleSchemes redefinedfunction DCprocessPackageNums redefinedfunction DCprocessUnits redefinedfunction DCprocessPhysicalLayers redefinedfunction DC_findSpecialPins redefinedfunction DC_matchWildCardStacks redefinedfunction DC_searchWildCardStack redefinedfunction DCfindPackages redefinedfunction DCoutputEOF redefinedfunction DCupdateDiffpairEntries redefinedfunction DCfindParts redefinedfunction DCprocessActiveRoutingLayers redefinedfunction DCprocessRuleAreas15 redefinedfunction DCprocessRuleAreas redefinedfunction DCscaled redefinedfunction DCprintLorRVoid redefinedfunction DCprintLineVoid redefinedfunction DCprintPolyVoid redefinedfunction DCprintRectangleVoid redefinedfunction DCprintKeepoutText redefinedfunction DCgetCompPart redefinedfunction DCfindPlaneNets redefinedfunction DCcheckBadBoundary redefinedfunction DCoverlapBbox redefinedfunction DCintersect redefinedfunction DCdrawBoundary redefinedfunction DCdrawBoundaryGeneric redefinedfunction DCgetHeight redefinedfunction DCprintCircleVoid redefinedfunction DCdrawCircle redefinedfunction DCpointOnArc redefinedfunction DCpointsOnArc redefinedfunction DCpointsOnPathArc redefinedfunction DCClineDummyList redefinedfunction DCViaDummyList redefinedfunction DCFindAllClines redefinedfunction DCFindAllVias redefinedfunction DCfindAllOfType redefinedfunction DCsaveSelSet redefinedfunction DCrestoreSelSet redefinedfunction DCaddWidthOverride redefinedfunction DCaddClearOverride redefinedfunction DCaddPowerNet redefinedfunction DCsetLayerSignal redefinedfunction DCprintableString redefinedfunction DCreplaceChars redefinedfunction DCremoveQuotes redefinedfunction DCaddLayerNumber redefinedfunction DCgetLayerNumber redefinedfunction DCgetPartNumber redefinedfunction DCgetComponentNumber redefinedfunction DCcheckSpacingNetClassNumber redefinedfunction DCgetSpacingNetClassNumber redefinedfunction DCcheckPhysicalNetClassNumber redefinedfunction DCgetElectricalNetClassNumber redefinedfunction DCgetPhysicalNetClassNumber redefinedfunction DCgetRuleSchemeData redefinedfunction DCgetNetClassNumber redefinedfunction DCgetPadstackNumber redefinedfunction DCgetPackage redefinedfunction DCenableDC_Debug redefinedfunction DCdisableDC_Debug redefinedfunction DCDebugDump redefinedfunction DCgetMatchedGroupNumber redefinedfunction DCgetNetNumber redefinedfunction DCselectRouting redefinedfunction DCcreateFormula redefinedfunction DCcreateWidthEntry redefinedfunction DCCopyWidths redefinedfunction DCaddViaListEntry redefinedfunction DCcopyViaListEntry redefinedfunction DCcreateMatchedDelayEntry redefinedfunction DCcreateElectricalEntry redefinedfunction DCcreateClearanceEntry redefinedfunction DCCopyClearance redefinedfunction DCupdateSpacingRule redefinedfunction DCupdateSingleSpacing redefinedfunction DCisPadstackVia redefinedfunction DCprocessProperties redefinedfunction DCprintGlobalPoly redefinedfunction DCtransformGlobalPoly redefinedfunction DCtransformPoly redefinedfunction DCtransformPoint redefinedfunction DCExportSummary redefinedfunction DCShowExportLog redefinedfunction DCemptyTables redefinedfunction DCgetRelRotation redefinedfunction DCdeg2rad redefinedfunction DCgetVoidType redefinedfunction DCinitPoly redefinedfunction DCaddPolyPoint redefinedfunction DCcreateError redefinedfunction DCSetupErrorLog redefinedfunction DCgetFromRefDesPin redefinedfunction DCgetFromDelayString redefinedfunction DCisMatchedDelayLengthTime redefinedfunction DCgetFromCompositeName redefinedfunction DCgetLayerName redefinedfunction DCmakeLayerList redefinedfunction DCcreateDir redefinedfunction DCdeleteClasses redefinedfunction DCdeleteProps redefinedfunction DCdeleteItems redefinedfunction DCgetFileType redefinedfunction DCremoveDirString redefinedfunction DCmakeDirList redefinedfunction DCmakeDirName redefinedfunction DCComparePathPts redefinedfunction DCGetSymbolProps redefinedfunction DCprintCompGeometry redefinedfunction DCwriteGraphicShape redefinedfunction DCdrawGraphicShape redefinedfunction DCgenLineVoids redefinedfunction DCisClosedPath redefinedfunction DCprocessRoutingExtract redefinedfunction DCcreateExtractScripts redefinedfunction DCcreateForcedNetExtractScript redefinedfunction DCdeleteExtractScripts redefinedfunction genHKPPadstacks redefinedfunction parseThermalPad redefinedfunction genCustomPads redefinedfunction issuePad redefinedfunction displaySymbolsNum redefinedfunction al2expIsDebug redefinedfunction al2exp_287110 redefinedfunction al2exp_enable_287110 redefinedfunction al2exp_disable_287110 redefinedfunction genHKPCells redefinedfunction all2expFindArc redefinedfunction all2expOutputCoordinates redefinedfunction all2expGetRelRotation redefinedfunction all2expTransformPoint redefinedfunction all2expDeg2rad redefinedfunction all2expSetSelectSymbols redefinedfunction all2expGetPackageGroupAndMount redefinedfunction all2expAddBreakoutToPinNet redefinedfunction all2expFindPinByCoord redefinedfunction all2expIssueEtch redefinedfunction all2expIssueNetEtch redefinedfunction genHKPTestPoints redefinedfunction SetupDir redefinedfunction createAll2ExpFileHeader redefinedfunction fillinAll2ExpBaseview redefinedfunction createAll2ExpBaseview redefinedfunction NE_Main redefinedfunction NE_NetClass redefinedfunction NE_Physical redefinedfunction NE_Spacing redefinedfunction NE_ClassBody redefinedfunction NE_ProcessTiming redefinedfunction NE_replaceChars redefinedfunction NE_DebugInfo redefinedW- *WARNING* defstruct: Redefining Structure DC_sControlVars.W- *WARNING* defstruct: Redefining Structure DC_sPackage.W- *WARNING* defstruct: Redefining Structure DC_sText.W- *WARNING* defstruct: Redefining Structure DC_sClearance.W- *WARNING* defstruct: Redefining Structure DC_sDefClearance.W- *WARNING* defstruct: Redefining Structure DC_sWidth.W- *WARNING* defstruct: Redefining Structure DC_sNetData.W- *WARNING* defstruct: Redefining Structure DC_sElectricalRule.W- *WARNING* defstruct: Redefining Structure DC_sMatchedDelayRule.W- *WARNING* defstruct: Redefining Structure DC_sRuleArea.W- *WARNING* defstruct: Redefining Structure DC_sFormula.W- *WARNING* defstruct: Redefining Structure DC_netPinData.W- *WARNING* defstruct: Redefining Structure DC_netKeyData.W- *WARNING* defstruct: Redefining Structure DC_sSymbolProps.t
根据Allegro to PADS® Layout Translator User's Guide(提取码：x8fs)给出的信息，执行脚本之后，如果有错误，是必须解决的，否则无法正确地生成输出文件。上面列出的信息，只有警告，我也不知道是否会产生什么特别严重的问题。
执行命令skill load "dfl_main.il"之后，还需要在Command提示窗口中输入另一命令main out，这会打开Allegro To Xpeditio...对话框，点击Start Translation启动转换，转换期间会弹出许多窗口，这个不用管。
注意：.brd设计文件的文件名不能带有空格或其它特殊字符，存放设计文件的文件夹也类似。我一开始转换的时候，就是因为文件名、文件夹名中带有空格，导致错误而折腾了很久。
转换完成之后，提示没有错误，但是有警告！始终不尽人意！
Command > main outPlease wait...extracting and processing technology fileStarting Export techfile...techfile completed successfully, use Viewlog to review the log file.techfile completed successfully, use Viewlog to review the log file.Converting techfile...Executing command E:/Allegro2PADSLayout/GE300_LITE_PEDAL_DOWN_B02_MGC/Work\techconv.batTechfile conversion successfull!extracting Layer Stackupextracting Design RulesDeleting Existing Classes FileDeleting Existing Props FileDeleting Existing Board Items FileExporting Electrical Constraints...Reading report definition file 'D:/Cadence/Cadence_SPB_16.6-/share/pcb/signal/reports.dat'.Finished reading report definition file successfully.Reading report definition file 'D:/Cadence/Cadence_SPB_16.6-/share/pcb/signal/custom_rep.dat'.Finished reading report definition file successfully.extracting device filesextracting Net Propertiesextracting Board ExtentLoading axlcore.cxt DCprocessWidthTable - DEFAULT width usedextracting padstacksextracting padstack completedextracting Placementleaving placementextracting Device Padsdevices pads extraction completedextracting Board AreasLoading skillExt.cxt Starting report...report completed successfully, use Viewlog to review the log file.report completed successfully, use Viewlog to review the log file.Exporting net information.There are 8 different component properties in this database.There are 103 different net properties in this database.Hierarchical net constraints have been flattened onto individual nets for export.There are no pin properties in this database.E:/Allegro2PADSLayout/GE300_LITE_PEDAL_DOWN_B02_MGC/Work/propdelay_raw.tmp has been created.Loading cmds.cxt E:/Allegro2PADSLayout/GE300_LITE_PEDAL_DOWN_B02_MGC/Work/LayoutDB.dfl Output Complete.Generating Padstack HKP FIle.--------------------------- Create .PAD Definitions.Create .HOLE Definitions.Create .PADSTACK Definitions.Generating Cell HKP File.--------------------------- Info: Database transaction started.Cell HKP Added temp instance of symbol: "CAP6D3"Cell HKP Added temp instance of symbol: "MARK_1MM"Cell HKP Added temp instance of symbol: "R0603"Cell HKP Added temp instance of symbol: "JL-0603RGB-TRB"Current Symbol: DRILL_HOLE_P_3MM2Current Symbol: R4D03Current Symbol: C0603Current Symbol: PH2MM54-12P_THRU90Current Symbol: JL-0603RGB-TRBCurrent Symbol: SW_12MMX12MM_SMDCurrent Symbol: TSSOP16Current Symbol: R0603Current Symbol: SOD-323Current Symbol: MARK_1MMCurrent Symbol: CAP6D3Removing temporarily added symbols.4 symbols removed.Creating Net PropertiesCreating Net Class---------------------- Al2Exp summary ----------------------Al2Exp - 0 error(s), 13 warning(s)Export log file saved at "E:/Allegro2PADSLayout/GE300_LITE_PEDAL_DOWN_B02_MGC\LogFiles\interfacelog.txt" fileRun "show log" command to view log file------------------------------ Done -------------------------------
执行完上一步骤之后，在存放.brd设计文件的文件夹下面，会生成一些文件和文件夹。
先关闭Allegro PCB Design XL (legacy)
打开PADS Layout，选菜单File > Import...
选择已执行过转换操作的设计文件
正在执行转换...
完成转换之后生成的日志
Allegro(R) to PADS Layout Translator (Version VX.2.3) 05/22/19 09:41:27Copyright (c) Mentor Graphics Corp. - All rights reserved------------------------------------------------------------Input folder: E:\Allegro2PADSLayout\GE300_LITE_PEDAL_DOWN_B02.brdOutput folder: GE300_LITE_PEDAL_DOWN_B02_pads.pcb [I] Preparing data...Output file: GE300_LITE_PEDAL_DOWN_B02_pads.pcb [I] Loading...[I] Translating Xpedition design files from 'C:\Users\MK\AppData\Local\Temp\' to PADS Layout design file[I] Reading Pad Stacks...[I] Reading Cells...[I] Reading Part Numbers...[I] Reading Job Prefernces...[I] Reading Net Classes...[I] Reading Net Properties...[I] Reading Layout...[I] Translating data...[W] Discriminate Pad Entry rules found, and the rules were not translated.[W] Tie legs option was not found, and was translated to 2 spokes.[W] Hole name 'ROUND 0.4000 P' is duplicated. The hole was not translated.[W] Hole name 'ROUND 0.3000 P' is duplicated. The hole was not translated.[W] Hole name 'ROUND 1.0000 P' is duplicated. The hole was not translated.[W] Inner sizes of thermal pad 'AB00' will be changed, according to it's regular counterpart.[W] Part type name 'CAP POL1_CAP6D3__220UF/16V' contained invalid characters, and was translated to 'CAP_POL1_CAP6D3__220UF/16V'.[W] Part type name 'DRILL HOLE_DRILL_HOLE_P_3MM2_DR' contained invalid characters, and was translated to 'DRILL_HOLE_DRILL_HOLE_P_3MM2_DR'.[W] Part type name 'FERRITE BEAD_R0603_220R' contained invalid characters, and was translated to 'FERRITE_BEAD_R0603_220R'.[W] Part type name 'MARK POINT_MARK_1MM_MARK POINT' contained invalid characters, and was translated to 'MARK_POINT_MARK_1MM_MARK_POINT'.[W] Part type name 'RES PACK 2_R4D03_1K' contained invalid characters, and was translated to 'RES_PACK_2_R4D03_1K'.[W] Part type name 'RES PACK 2_R4D03_360R' contained invalid characters, and was translated to 'RES_PACK_2_R4D03_360R'.[W] Part type name 'RES PACK 2_R4D03_430R' contained invalid characters, and was translated to 'RES_PACK_2_R4D03_430R'.[W] Route outlines are not supported, and was not translated.[I] Completed
完成导入(转换)之后的PCB
Allegro PCB 转 PADS Layout 之后的修修补补
