晶界势垒高度,barrier height at grain boundaries
1)barrier height at grain boundaries晶界势垒高度
1.Through measuring thebarrier height at grain boundaries, it is found that the sharp decrease of ZnO grain size mainly contributes to the significant increase of voltage gradient.晶界势垒高度揭示,ZnO晶粒尺寸的迅速减小是压敏电位梯度急剧增高的主要原因。
2)grain boundary barrier晶界势垒
1.Study on the UV photo-sensitive characteristic andgrain boundary barrier of ZnO thin filmsZnO薄膜紫外光敏特性及晶界势垒的研究
2.The low B-value of the grains and insignificantgrain boundary barrier give a good linear resistance-temperature characteristic of the composite within a temperature range of -20￣250℃.由于复合材料的晶粒具有极小的Ｂ值而晶界势垒也极小，使得该复合材料的电阻－温度特性呈现出良好的线性特征。
3.A new interpretation for the origin thegrain boundary barrier is oxide semiconductorceramics is proposed,It is suggested by the authors that the barrier originates from the dif-fusion of excess oxygen in grain boundaries during sintering.提出了一个关于氧化物半导瓷晶界势垒起源的新观点，认为晶界势垒起源于烧结过程中外界氧在晶界中的扩散，与材料的结构、化学缺陷、掺杂、外界气氛、烧结工艺、组成状态等有密切关系，并用此理论解释了许多实验现象。
英文短句/例句
1.Study on the UV photo-sensitive characteristic and grain boundary barrier of ZnO thin filmsZnO薄膜紫外光敏特性及晶界势垒的研究
2.Capacitance-voltage measurement of grain-boundary barrier in TiO2 varistors;电容—电压测试在TiO_2压敏材料晶界势垒研究中的应用
3.The Schottky Barrier at Grain Boundaries of Polycrystalline Ferroelectric Semiconductors多晶铁电半导体晶界处的肖特基势垒
4.schottky gate fet肖特基势垒栅场效应晶体管
5.enhancement type schottky barrier fet增强型肖特基势垒场效应晶体管
6.Study on Nucleation Potential Barrier of Amorphous Si Crystallization by Laser Annealling激光退火实现非晶Si晶化的成核势垒研究
7.Influence of barrier height of the front contact on the amorphous silicon and microcrystalline silicon heterojunction solar cells前端接触势垒高度对非晶硅和微晶硅异质结太阳电池的影响
8.PROGRESS ON FIRST-PRINCIPLES CALCULTIONS AND EXPERIMENTAL RESULTS OF SINGLE-CRYSTALLINE MAGNETIC TUNNEL JUNCTIONS WITH MgO BARRIERSMgO单晶势垒磁性隧道结的第一性原理计算和实验研究
9.We adopted the pseudopotential method and the first principle to calculate the alloy disorder effect of the atoms surrounding the impurity atoms.采用第一原理赝势法计算，分析和讨论了混晶无序效应对电子热俘获势垒精细结构的影响。
10.Influence of Metal/Organic Interface Barriers on the EL Efficiency in Single-layer Organic EL Devices金属 /有机界面势垒对单层有机电致发光器件发光效率的影响(英文)
11.A type of transistor in which very thin barriers ( by means of etching techniques ) are used, thus permitting the frequency range to be extended to 100 MHz.使用很薄势垒的一类晶体管(采用刻蚀技术),因而,其使用频率范围可达100兆赫。
12.schottky barrier photodiode肖特基势垒光电二极管
13.cottrell lomer barrier科特雷耳 洛末势垒
14.metal semiconductor barrier金属 半导体接触势垒
15.ping-pong memory乒乓式电位势垒存储器
16.The ISF is the world governing body of softball.国际垒球联合会是垒球的世界性管理机构。
17.schottky barrier mos肖特基势垒栅金属氧化物半导体
18.Schottky-barrier avalanche photodiode肖特基势垒雪崩光电二极管
相关短句/例句
grain boundary barrier晶界势垒
1.Study on the UV photo-sensitive characteristic andgrain boundary barrier of ZnO thin filmsZnO薄膜紫外光敏特性及晶界势垒的研究
2.The low B-value of the grains and insignificantgrain boundary barrier give a good linear resistance-temperature characteristic of the composite within a temperature range of -20￣250℃.由于复合材料的晶粒具有极小的Ｂ值而晶界势垒也极小，使得该复合材料的电阻－温度特性呈现出良好的线性特征。
3.A new interpretation for the origin thegrain boundary barrier is oxide semiconductorceramics is proposed,It is suggested by the authors that the barrier originates from the dif-fusion of excess oxygen in grain boundaries during sintering.提出了一个关于氧化物半导瓷晶界势垒起源的新观点，认为晶界势垒起源于烧结过程中外界氧在晶界中的扩散，与材料的结构、化学缺陷、掺杂、外界气氛、烧结工艺、组成状态等有密切关系，并用此理论解释了许多实验现象。
3)grain-boundary barrier晶界势垒
1.It is believed that thegrain-boundary barrier of the thin.结果表明,适当的掺杂量可以改善CdTe薄膜的结晶性能,降低晶界势垒高度,提高其导电性能。
2.The results show that the decomposition accompanying with oxidation is useful forincreasing the surface state density and the height ofgrain-boundary barrier, and therefore improves the nonlinear property of TiO_2 capacitor.结果发现，在晶界处发生的热分解氧化反应能增加界面态密度，提高晶界势垒高度，从而改善ＴｉＯ２电容压敏电阻器的非线性性能。
4)barrier height势垒高度
1.Average-bond-energy method in Schottkybarrier height calculation;Schottky势垒高度理论计算中的平均键能方法
2.Based on the measurement of the relation between the leakage current I and absolute temperature T in commercial ZnO varistor ceramic samples,thebarrier height(activation energy)was estimated in the presence of the expression of field enhanced thermal emission current and was found to be lower thanbarrier height on the balanced state.通过测量商用ZnO压敏陶瓷材料的泄漏电流I与绝对温度T,并利用场助热激发电流的表达式计算了势垒高度(活化能),发现它低于平衡状态时的势垒高度。
3.In order to solve this critical problem,this paper concen- trates on the effects of surface states and interfacial layer on Schottkybarrier height(SBH)by means of experiment and theory analysis.针对硅材料的肖特基势垒二极管(Schottky Barrier Diode,简称SBD)的击穿电压普遍很低,严重影响其实际应用的问题,采用实验与理论分析相结合的方式,着重于表面态、界面层对势垒高度的影响进行研究。
5)grain-boundary barrier model晶界势垒模型
1.The carrier transport characteristics of the InN thin films have been explained successfully on the basis of agrain-boundary barrier model, where the accumulation of holes at the grain boundaries has been found to play a key role.在晶界势垒模型的基础上 ,发现InN薄膜的电导特性取决于材料内部的晶界势垒高度 ,载流子输运特性是由于空穴在晶界处的积累决定的 。
6)Barrier heights效势垒高度
延伸阅读
晶界分子式：分子量：CAS号：性质：晶界是结构相同而取向不同晶体之间的界面。在晶界面上，原子排列从一个取向过渡到另一个取向，故晶界处原子排列处于过渡状态。
